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and mask signals • Programmable CAS (READ) latency (CL) • Programmable posted CAS additive latency (AL) • Programmable CAS (WRITE) latency (CWL) • Fixed burst length (BL) of 8 and burst chop (BC) of 4 (via the mode register set [MRS]) • Selectable BC4 or BL8 on-the-fly (OTF) • Self refresh mode • TC of –40°C to +105°C – 64ms
4522-150-20502
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5 V • DDR3L and DDR3L-RS DIMMs / DRAMS running at 1
• Available in small footprint packages - 44-pin PLCC (34 user I/O pins) - 44-pin VQFP (34 user I/O pins) - 48-pin CSP (38 user I/O pins) - 64-pin VQFP (52 user I/O pins) - 100-pin TQFP (72 user I/O pins) - Pb-free available for all packages • Optimized for high-performance 3
Intel Stratix IV Device part #EP4SGX360FF35C4G Case of 30 and mask signals • ProgrammableAltera Stratix IV FPGAs deliver a breakthrough level of system bandwidth and power efficiency for high end applications, allowing you to innovate without compromise. Stratix IV FPGAs are based on the Taiwan Semiconductor Manufacturing Company (TSMC) 40 nm process technology and surpass all other high end FPGAs, with the highest logic density, most transceivers, and lowest power requirements. Intel Stratix IV Device part #EP4SGX360FF35C4G ITL:
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